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I had an idea for NES which was already implemented in SNES

I had an idea for NES which was already implemented in SNES
by on (#225652)
I had an idea of what if a cartridge mapper for my NES game which I'd make on an FPGA chip could generate H-blank interrupts and directly shoot CPU instructions for pallete changes, scroll changes and etc. according to a certain so-called (as I called it) Scanline Context Table.

ONLY TO REALIZE IN THIS VIDEO THAT THIS FEATURE ALREADY EXISTS IN THE SNES AND IT'S CALLED HDMA!!!

What was I thinking!?

Seriously! As a kid, I've always judged some computer stuff by their weird name. "What's this system services svchost.exe? That's stupid. It's taking a lot of CPU usage and RAM.". Has anyone ever had such an approach towards things only to find out that those things are actually what you were searching for?
Re: I had an idea for NES which was already implemented in S
by on (#225654)
Quote:
THIS FEATURE ALREADY EXISTS IN THE SNES


And gameboy color.
Re: I had an idea for NES which was already implemented in S
by on (#225656)
Except HDMA in Super NES and GBC are used for almost opposite purposes. HDMA in GBC can write only to VRAM, not CGRAM or the scroll position. It does this during VRAM time slots unused by the interleaved background/sprite pattern fetch. HDMA in Super NES, by contrast, can write to almost any PPU register except the VRAM data register because sprite pattern fetch takes all the VRAM time slots that background rendering doesn't take. A mapper-driven implementation of HDMA on NES would more closely resemble the Super NES version, as it has the same VRAM access time constraint.
Re: I had an idea for NES which was already implemented in S
by on (#225683)
yes HDMA is the Ambrosia, and I would love to have it on my C64/128 as well (kinda working on it ), its no COPPER mind ;)

Slight issue on the NES though, you don't have the 6510's AEC pin, the 6502 doesn't tri-state the bus, so you can't take over the BUS on a NES... Unless you are willing to RESET the CPU each line.. not very practical..
Re: I had an idea for NES which was already implemented in S
by on (#225734)
Oziphantom said:
Quote:
Slight issue on the NES though, you don't have the 6510's AEC pin, the 6502 doesn't tri-state the bus, so you can't take over the BUS on a NES... Unless you are willing to RESET the CPU each line.. not very practical..

One can hold the CPU in reset?
(And it's bus is high-Z in reset?)
Re: I had an idea for NES which was already implemented in S
by on (#225736)
Not really.

If you have a front-loader, and the CIC stops working, the CIC will hold the NES's CPU in reset for 1/2 second and then let it run for 1/2 second, repeating.

While the NES's CPU is reset, all of its outputs are hi-Z.
Re: I had an idea for NES which was already implemented in S
by on (#225779)
well yes you can hold in reset but that is not practical.

in that you want to hit reset at a specific clock on each line. So now your entire code base becomes a FSM and you have to write every "state" to be what ~100 clocks? You can't preserve a,x,y,status between them, and if you take to long you just get nuked by the reset. So you have to put all of your code into these perfect timed chunks, almost like making an Atari 2600 game ;)
Possible, yes, Practical no. Well would be fine for a demo.

Or hold it in Reset for the entire frame, only dropping out of reset during VBlank, which is probably more practical, but as you will probably need to spend most of your VBlank time making your VRAM updates, you won't have much time left update your game logic. PAL wouldn't probably be that bad..